FIG. 1 shows a fundamental structure diagram of a switch network, comprising two parts, a line card and a switch board, wherein the line card comprises: an ingress line card and an egress line card.
In order to meet the requirement of switch control, the related high-speed router usually adopts the length-fixed information element switch mechanism, such as, dividing an arrived IP message into multiple information elements with fixed length. In the switch board, the information element can reach the egress line card through multiple paths. The time delays of different paths are different, which causes that multiple information elements belonging to one data packet reach the egress line card disorderly.
In addition, under the condition that multiple ingress line cards transmit data to one egress line card, the information elements of different data packets interleave. This requires very large cache in the egress line card to store these information elements. After all information elements of the data packet are received, these information elements are recombined into a data packet and then are transmitted out. Thus, the operation process is extraordinarily complex, and it is difficult to meet the requirements of resource and performance. And, it will cause a relatively large time delay when multiple ingress line cards transmit data to one egress line card at the same time. As shown in FIG. 2, supposing that N ingress line cards transmit data packets to the egress line card #k at the same time, and most of the information elements of each data packet have reached the egress line card #k and they are waiting for arrival of their last information element, then the following three results are produced: the egress line card #k needs a very large cache; the complexity of data packet recombination is high; and the time delay of the last recombined data packet will be the accumulation of the time delays of previous N−1 data packets, and the time delay jitter is very large.
For reducing the difficulty of data packet recombination, the relevant technologies adopt the information element order preserving technology. This technology uses a cache with relatively large capacity at the output port of the switch board to reorder these information elements, that is, controlling the order of transmitting the information elements at the output port of the switch board. As shown in FIG. 3, after the switch board adopts the information element order preserving technology, the information elements belonging to the same data packet reach the egress line card in order, thereby solving the disorder problem when the information elements with fixed length pass the switch board.
The inventors find that the information element order preserving technology reduces the cache of the egress line card to some extent, but increases the cache of the switch board. In addition, the switch board needs to reorder the information elements, and the egress line card still needs to wait for a long time for the completion of the recombination and transmission of the whole data packet, thereby causing the problems of large time delay and jitter in the information element switch process.